Modified model of gate leakage currents in AlGaN/GaN HEMTs
Wang Yuan-Gang, Feng Zhi-Hong†, , Lv Yuan-Jie‡, , Tan Xin, Dun Shao-Bo, Fang Yu-Long, Cai Shu-Jun
National Key Laboratory of Application Specific Integrated Circuit (ASIC), Hebei Semiconductor Research Institute, Shijiazhuang 050051, China

 

† Corresponding author. E-mail: ga917vv@163.com

‡ Corresponding author. E-mail: yuanjielv@163.com

Project supported by the National Natural Science Foundation of China (Grant No. 61306113).

Abstract
Abstract

It has been reported that the gate leakage currents are described by the Frenkel–Poole emission (FPE) model, at temperatures higher than 250 K. However, the gate leakage currents of our passivated devices do not accord with the FPE model. Therefore, a modified FPE model is developed in which an additional leakage current, besides the gate (III), is added. Based on the samples with different passivations, the III caused by a large number of surface traps is separated from total gate currents, and is found to be linear with respect to (φBVg)0.5. Compared with these from the FPE model, the calculated results from the modified model agree well with the IgVg measurements at temperatures ranging from 295 K to 475 K.

1. Introduction

AlGaN/GaN high electron mobility transistors (HEMTs) have lots of advantages, such as large critical electrical field, high two-dimensional electron gas (2DEG) density and high saturation velocity. Therefore, AlGaN/GaN HEMTs are suitable for realizing high-power and high-efficiency amplifiers for the next generation wireless communication, satellite communication and radar systems.[14] However, excessive gate leakage current in the power AlGaN/GaN HEMT remains a critical challenge. It is commonly believed that the high reverse gate leakage current is tunneling current caused by high-density traps.[510] Some of the researchers reported that the reverse gate leakage current is dominated by Frenkel–Poole emission (FPE) under high temperatures (> 250 K) and carrier transport via trapped state near the gate metal/semiconductor interface is a dominant source.[79]

In this paper, the gate leakage currents of our passivated devices are found not to accord with those from the FPE model. Thus, a modified model of FPE is developed by implementing an additional leakage current path besides the gate, which is caused by passivation/semiconductor surface traps. In order to separate the additional leakage current from the total current and obtain the modified current expression, two samples of AlGaN/GaN HEMTs are fabricated. One is with ALD-AlN/PECVD-SiNx mixed passivation, and the other is only with PECVD SiNx passivation. It is found that the measured data and the results from the modified model are in excellent agreement with each other at the temperatures ranging from 295 K to 475 K.

2. Device fabrication

The schematic cross-sections of the AlGaN/GaN HEMTs are shown in Fig. 1. Two samples of AlGaN/GaN HEMTs were fabricated by using the same material and device processing, but with different passivation. Sample A was passivated by PEALD AlN/PECVD SiNx, and sample B was only passivated by PECVD SiNx. The AlGaN/GaN heterostructure was grown by metal organic chemical vapor deposition (MOCVD) on a 2-inch (1 inch = 2.54 cm) SiC substrate. A 2-μm undoped GaN layer, a 1-nm AlN spacer, and a 12-nm Al0.3Ga0.7N barrier layer were epitaxed from the bottom to top. Room-temperature Hall measurements show the 2DEG density of 1.08 × 1013 cm−2 and electron mobility of 2079 cm2/(V·s), resulting in a sheet resistance of 278 Ω/□.

Fig. 1. Cross sections of AlGaN/GaN HEMTs: (a) Sample A passivated by PEALD AlN/PECVD SiNx, (b) Sample B passivated by PECVD SiNx.

The device isolation was formed by Cl2/BCl3 plasma dry etching. Then, the Ti/Al/Ni/Au metal stack deposition was annealed at 850 °C for 30 s in nitrogen atmosphere to realize ohmic contact (0.45 Ω·mm). The source–drain spacing was 8 μm. After that, a 2-μm Schottky gate with Ni/Au (50/200 nm) metal stack was deposited by electron-beam evaporation, located in the middle of the source–drain spacing. Sample A was passivated by 5-nm ALD-AlN and 50-nm PECVD-SiNx at 300 °C, while sample B was passivated only by 50-nm PECVD SiNx at 300 °C.

3. Results and discussion

The temperature-dependent gate current–gate voltage (IgVg) curves of Samples A and B are shown in Fig. 2. The reverse gate current densities increase with increasing reverse gate bias and temperature.

Fig. 2. IgVg characteristics of (a) sample A, (b) sample B, and ln(Jg/Er) − characteristics of (c) sample A and (d) sample B.

For the high temperatures (> 250 K), the gate leakage current is dominated by the emission of electrons via traps, which is successfully explained by the FPE model. The current density associated with FPE is given by[8]

where Er is the electric field in the semiconductor at the gate metal/semiconductor interface, φt is the barrier height for electron emission from the trap state, εS and ε0 are the relative dielectric permittivity and permittivity of free space, respectively, q is the electron charge, T is the absolute temperature, k is the Boltzmann’s constant, and M is a constant. Equation (1) can be rewritten as

where

From Eqs. (2)–(4), it can be found that ln(JFPE/Er) should be a linear function of . However, the values of gate current density Jg of samples A and sample B do not accord with those from the FPE model as shown in Figs. 2(c) and 2(d) respectively. This is because there should be additional gate leakage path (Region II) besides the leakage currents in Region I for FPE as shown in Fig. 3.

Fig. 3. Tracks of electrons at high reverse gate voltage.

Based on the Poisson equation, the width of the electrons emitting from gate to the surface trap can be expressed as

where is the concentration of the ionized surface donor trap, ϕB is the Schottky barrier height, and Vg is the applied gate voltage.

The vertical electric field in region II (as shown in Fig. 3) can be expressed as

where CII and QII are the capacitance and the total electrons emitting from the gate in region II, respectively, hbarrier is the height of barrier, Z is the width of gate, and can be expressed as[11]

where

with

NII and φII being the concentration and energy level of the surface donor traps, respectively, EF the Fermi energy level, E the bottom of the conduction band, h the Planck’s constant, and the efficient electrons’ mass around the bottom conduction band. Combining Eqs. (7) and (8), can be expressed as

where (EφII)/kT is always much greater than 1, so equation (10) can be predigested as

When EII − y > EFPE (EFPE is the critical electric field for the FPE, which is related not only to the surface traps, but also to the bulk traps and dislocation-related continuum states in the barrier.[13] With the increasing of Al mole fraction of AlxGa1− xN barrier, the dislocation-related continuum states increase, which will reduce the barrier height for electron emission from the trap state and EFPE), the gate leakage current density in region II can be expressed as

The gate leakage current in region II can be expressed as

Substituting Eqs. (5), (6), and (12) into Eq. (13), III can be written as

where

Based on Eqs. (11), (14), and (15), it can be concluded that the plot of III versus (ϕBVg)0.5 should be a straight line.

In order to obtain the trap states at the gate metal/semiconductor interface by Ctf characteristics, large area devices are fabricated. The gate areas of sample A′ passivated by AlN/SiNx and sample B′ passivated by SiNx are both 80 μm×100 μm. Figure 4 shows that the Ctf characteristics of samples A′ and B′ are almost the same, and Ct can be expressed as[13]

where A is the area of Schottky gate, Nt is the effective density of interface traps, f is the frequency, and τ is the trap time constant relating to trap level.

Fig. 4. Ctf characteristics of (a) sample A′ and (b) sample B′.

Based on Eq. (16) and the measured Ctf curve, it can be concluded that the trap states at the gate metal/semiconductor interface are the same for both samples A′ and B′ (Nt and τ are 3.39 × 1012 cm−2· eV−1 and 4.4 μs as shown in Fig. 4). The passivation will not affect the gate metal/semiconductor interface state, but it will affect the surface state besides the gate. Therefore, only III of sample A and sample B are not equal, and ΔIg can be expressed as follows:

where N(B) and N(A) are only related to the temperature, the concentration and energy level of surface traps. Therefore, the plot of ΔIg versus (ϕBVg)0.5 should be a straight line. The plots of temperature-dependent ΔIg versus (ϕBVg)0.5 are shown in Fig. 5. The plots of ΔIg versus (ϕBVg)0.5 are almost straight lines at the temperatures ranging from 295 K to 475 K. This is a powerful proof for the additional gate leakage current path besides the gate.

Fig. 5. Plots of ΔIg versus (ϕBVg)0.5.

The modified model of FPE can be given by

where

When |Vg| < Vth (|Vg| values for samples A and B are both nearly 3.3 V), the electric field in the semiconductor under the gate metal can be approximately expressed as

Substituting Eqs. (14), (19), and (20) into Eq. (18), Ig can be written as

where N, N2, N3, and N4 are only related to the temperature and energy level of surface trap and also the concentration of surface traps. When Vth < Vg < −0.6 V, there is excellent agreement between the measured IgVg data and those from our modified model for different temperatures as shown in Fig. 6. However, deviations are observed between the measured IgVg curves and the FPE model.

Fig. 6. Comparison of the results from FPE model (red dashed lines), and the modified FPE model (black solid lines) with the measured reverse IgVg data for different temperatures of sample B.

The modified FPE model is only suitable for the single channel, but unsuitable for the AlGaN/GaN double-channel HEMTs.[1417] The capacitance in region II (CII) is comprised of CII1 and CII2 (as shown in Fig. 7), where CII2 is related to Vg. Combining with Eqs. (6), it can be concluded that the vertical electric field in region II (EII − y) is related to Vg. Then, combining with Eqs. (5), (6), (12)–(14), it is clear that III versus (ϕBVg)0.5 will not be a straight line any more. Therefore, the modified FPE model is unsuitable for the AlGaN/GaN double-channel HEMTs.

Fig. 7. AlGaN/GaN double-channel HEMT.
4. Conclusions

By considering the non-ideal interface states, a modified model of gate leakage current in AlGaN/GaN HEMT is proposed. Comparing with the FPE model, the modified model introduces an additional leakage current path bypassing the gate (III). In order to separate the gate leakage currents, two samples with different passivation are fabricated. III is a linear function of (ϕBVg)0.5, which is proved by the plots of temperature-dependent ΔIg−(ϕBVg)0.5 of samples A and B. Moreover, the modified gate leakage current model is verified by comparing with the measured temperature-dependent IgVg of sample B, showing excellent agreement. In addition, it should be pointed out that the modified FPE model is only suitable for the single channel, but unsuitable for the AlGaN/GaN double-channel HEMTs.

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